Within Hard Bottlenecks
Could the Physical World Slow an AI Takeoff?
Electricity, cooling, advanced chips and data-centre construction could turn rapid software progress into a much slower industrial expansion.
On this page
- Which chip and memory constraints could bind first
- Why power, cooling and networking create long delays
- Whether existing infrastructure is enough for several improvement rounds
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Introduction
A common assumption in fast AI takeoff scenarios is that once software becomes capable of improving itself, progress could accelerate almost without limit. One of the strongest objections is that frontier AI depends on physical infrastructure that cannot be copied or expanded at software speed. Advanced chips, high-bandwidth memory, electricity, cooling systems, networking equipment and new data centres all require years of investment, construction and manufacturing.
Within debates about AI doom and existential risk, this matters because a slower industrial buildout could provide more time for safety research, governance and adaptation. Equally, physical constraints might only delay rather than prevent rapid capability gains if software becomes much more efficient or if existing infrastructure is already sufficient for several generations of improvement. The key question is therefore not whether hardware matters—it clearly does—but whether physical bottlenecks are temporary speed bumps or hard limits on recursive AI progress.
Which chip and memory constraints could bind first?
The most obvious constraint is not simply the number of AI processors available, but the specialised supply chain needed to manufacture them.
Leading AI accelerators rely on several scarce components working together:
- Advanced semiconductor fabrication using the newest manufacturing processes.
- High-bandwidth memory (HBM), which supplies data fast enough to keep AI processors fully utilised.
- Advanced packaging technologies, such as CoWoS (Chip-on-Wafer-on-Substrate), which combine processors and memory into a single high-performance package.
- Sophisticated networking hardware that links tens or hundreds of thousands of processors into one training cluster.
A useful misconception to avoid is that semiconductor fabrication alone determines AI capacity. Recent supply-chain analyses suggest that advanced packaging and HBM have become more restrictive than leading-edge logic production itself. In other words, enough processor dies may exist, but insufficient packaging or memory can still prevent complete AI systems from being assembled.[Epoch AI]epoch.aiai chip supply chain constraintsAdvanced packaging and HBM, not logic dies, were the bottlenecks on AI chip production in 2025 | Epoch AIMarch 12, 2026…
This distinction matters for AI takeoff. Manufacturing capacity for advanced packaging facilities cannot be expanded in weeks. New plants require specialised equipment, trained engineers and long qualification processes before they can produce reliable components at scale. Even firms investing billions of pounds typically wait years before new capacity becomes available.[arXiv]arxiv.orgarXiv US Microelectronics Packaging Ecosystem: Challenges and OpportunitiesUS Microelectronics Packaging Ecosystem: Challenges and OpportunitiesOctober 18, 2023…
Another important limitation is concentration. Much of the world’s frontier AI hardware depends on a relatively small number of manufacturers and suppliers. A disruption affecting advanced memory, packaging or fabrication therefore affects many AI developers simultaneously rather than just one company.
Why power, cooling and networking create long delays
Even if chips were unlimited, they still need somewhere to operate.
Modern frontier AI training increasingly takes place inside purpose-built data centres that consume extraordinary amounts of electricity while producing equally extraordinary quantities of heat. Building these facilities involves far more than purchasing servers.
Operators typically require:
- High-capacity electrical connections.
- Grid upgrades or entirely new substations.
- Backup power systems.
- Large-scale cooling infrastructure.
- Fibre networking.
- Planning permission, construction and environmental approvals.
These projects often have timelines measured in several years rather than months. Energy analysts increasingly identify electricity availability—not processor design—as one of the longest-duration constraints on expanding AI computing capacity.[CSIS]csis.orgThe Electricity Supply Bottleneck on U.S. AI DominanceThe Electricity Supply Bottleneck on U.S. AI DominanceMarch 3, 2025…
Cooling creates another physical limit. As processor density rises, removing heat becomes progressively harder. More efficient cooling technologies, including liquid cooling, can raise capacity, but deploying them across entire data centres is itself an engineering project requiring specialised equipment and significant capital expenditure.[techradar.com]techradar.comSilicon photonics leverages CMOS compatibility, enabling the integration of optical and electronic components on a single chip using exis…
Networking introduces a further bottleneck that receives less public attention. Extremely large AI training runs require thousands of processors to exchange information continuously. As clusters expand, communication overhead grows, meaning that adding more processors does not always produce proportional performance gains. Large cloud operators invest heavily in networking precisely because bandwidth and congestion can become limiting factors for large distributed workloads.[USENIX]usenix.orgPreventing Network Bottlenecks: Accelerating Datacenter Services with Hotspot-Aware Placement for Compute and Storage | USENIX…
Could software improvements bypass hardware shortages?
Supporters of rapid AI progress argue that hardware constraints are real but may not be decisive.
One possibility is algorithmic efficiency. Better training methods can reduce the amount of computation required to achieve a given capability. Historically, improvements in algorithms have sometimes delivered gains comparable to hardware improvements, effectively making existing compute go further.
Another possibility is improved utilisation. AI systems might discover better scheduling, compiler optimisations or parallelisation methods that extract substantially more useful work from existing hardware before new chips are needed.
Emerging hardware architectures may also reduce current bottlenecks. Wafer-scale processors, improved optical interconnects and more efficient system software aim to reduce communication costs and improve memory bandwidth, allowing larger workloads to run more effectively on available infrastructure.[USENIX]usenix.orgWafer-Scale AI Compute: A System Software Perspective | USENIXWafer-Scale AI Compute: A System Software Perspective | USENIX…
From the perspective of AI doom, however, these developments cut both ways. Better utilisation reduces infrastructure constraints, potentially accelerating capability growth rather than slowing it.
Is today’s infrastructure already enough for several improvement rounds?
An important disagreement concerns timing rather than principle.
One camp argues that recursive improvement would quickly outrun existing hardware. Once today’s largest clusters have been fully exploited, further progress would require major industrial expansion that cannot occur overnight.
Another argues that current infrastructure may already be sufficient for several successive generations of increasingly capable systems. If AI researchers—or AI systems themselves—can repeatedly improve algorithms using existing compute, then substantial capability gains might occur before hardware becomes a binding constraint.
This disagreement reflects uncertainty about how much “headroom” remains inside existing infrastructure. No one knows exactly how many major algorithmic advances can still be extracted before significantly larger compute budgets become essential.
The answer also depends on what kind of recursive improvement is imagined. If each improvement only requires modest experiments, existing clusters could support many iterations. If each improvement requires training substantially larger frontier models, infrastructure limitations become important much sooner.
Why physical bottlenecks matter differently in AI doom arguments
Within existential-risk discussions, physical constraints mainly affect the speed of takeoff rather than whether advanced AI is ultimately achievable.
If hardware expansion remains slow, policymakers, regulators and AI safety researchers may gain additional years to improve evaluations, interpretability techniques, monitoring systems and governance arrangements before systems become dramatically more capable.
However, delay is not necessarily protection.
Several reasons explain why physical bottlenecks may only postpone rather than eliminate existential risk:
- Companies may continue expanding infrastructure while software steadily improves.
- AI itself may accelerate chip design, data-centre engineering or supply-chain optimisation.
- Governments could prioritise AI infrastructure as strategically important, accelerating investment.
- More efficient algorithms may reduce dependence on continually increasing hardware.
Conversely, bottlenecks could become more significant than many forecasts assume if electricity supply, advanced packaging, memory production or construction timelines prove harder to expand than expected. Some analysts increasingly argue that the limiting resource has shifted from processors alone to an entire industrial ecosystem including power, cooling, packaging and networking.[epoch.ai]epoch.aiai chip supply chain constraintsAdvanced packaging and HBM, not logic dies, were the bottlenecks on AI chip production in 2025 | Epoch AIMarch 12, 2026…
What this uncertainty means for intelligence explosion forecasts
Physical infrastructure is one of the strongest practical objections to the idea of an almost instantaneous intelligence explosion. Unlike software, semiconductor factories, electrical grids and data centres cannot be duplicated with a few lines of code.
At the same time, it would be a mistake to assume that physical constraints automatically make AI doom implausible. History shows that industries can expand rapidly when demand, capital and political priority align, even if expansion is measured in years rather than weeks.
The central uncertainty is therefore one of pace. If physical infrastructure remains the dominant constraint, AI capability growth may resemble a fast industrial buildout rather than an overnight software event. If software efficiency continues improving faster than infrastructure becomes limiting, existing compute could sustain several rounds of rapid capability gains before those industrial limits become binding.
For readers evaluating AI doom arguments, physical bottlenecks should be understood less as a refutation of rapid takeoff than as one of the most significant sources of uncertainty in forecasting how quickly advanced AI could progress.
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Endnotes
1.
Source: epoch.ai
Title: ai chip supply chain constraints
Link:https://epoch.ai/data-insights/ai-chip-supply-chain-constraints
Source snippet
Advanced packaging and HBM, not logic dies, were the bottlenecks on AI chip production in 2025 | Epoch AIMarch 12, 2026...
Published: March 12, 2026
2.
Source: arxiv.org
Title: arXiv US Microelectronics Packaging Ecosystem: Challenges and Opportunities
Link:https://arxiv.org/abs/2310.11651
Source snippet
US Microelectronics Packaging Ecosystem: Challenges and OpportunitiesOctober 18, 2023...
Published: October 18, 2023
3.
Source: csis.org
Title: The Electricity Supply Bottleneck on U.S. AI Dominance
Link:https://www.csis.org/analysis/electricity-supply-bottleneck-us-ai-dominance
Source snippet
The Electricity Supply Bottleneck on U.S. AI DominanceMarch 3, 2025...
Published: March 3, 2025
4.
Source: arxiv.org
Title: arXiv Compute at Scale: A Broad Investigation into the Data Center Industry
Link:https://arxiv.org/abs/2311.02651
5.
Source: techradar.com
Link:https://www.techradar.com/pro/how-silicon-photonics-lights-the-way-for-data-centers
Source snippet
Silicon photonics leverages CMOS compatibility, enabling the integration of optical and electronic components on a single chip using exis...
6.
Source: usenix.org
Link:https://www.usenix.org/conference/nsdi25/presentation/bazzaz
Source snippet
Preventing Network Bottlenecks: Accelerating Datacenter Services with Hotspot-Aware Placement for Compute and Storage | USENIX...
7.
Source: usenix.org
Title: Wafer-Scale [AI Compute]({{ ‘compute-limits/’ | relative_url }}): A System Software Perspective | USENIX
Link:https://www.usenix.org/publications/loginonline/wafer-scale-ai-compute-system-software-perspective
Source snippet
Wafer-Scale AI Compute: A System Software Perspective | USENIX...
8.
Source: csis.org
Link:https://www.csis.org/analysis/impact-tariffs-ai-data-center-buildout-balancing-supply-chain-security-and-ai
9.
Source: epoch.ai
Title: introducing the ai chip components explorer
Link:https://epoch.ai/latest/introducing-the-ai-chip-components-explorer
Additional References
10.
Source: reuters.com
Link:https://www.reuters.com/business/retail-consumer/energy-use-forcing-rethink-ai-chip-design-tsmc-says-2026-05-28/
Source snippet
Kevin Zhang, TSMC’s Senior VP of Business Development, noted that customers — including those in mobile, IoT, and high-performance AI dat...
11.
Source: youtube.com
Link:https://www.youtube.com/watch?v=a0uQ1ZxfxfQ
Source snippet
AI power grid energy compute bottleneck data center chip shortage Real Reason Why AI Data Centers Are Running Out of Power (It's Not Powe...
12.
Source: youtube.com
Title: How AI Is Pushing the Semiconductor Supply Chain to the Limit | Bloomberg Primer
Link:https://www.youtube.com/watch?v=VdcD6qX8Xrc
Source snippet
Why AI Chips Made In The U.S. Are Being Sent To Taiwan — Creating A Major Bottleneck...
13.
Source: youtube.com
Link:https://www.youtube.com/watch?v=qk71RxoMads
Source snippet
Why Tech Companies Are Quietly Cancelling AI Data Centers...
14.
Source: youtube.com
Title: How The Massive Power Draw Of Generative AI Is Overtaxing Our Grid
Link:https://www.youtube.com/watch?v=MJQIQJYxey4
Source snippet
Real Reason Why AI Data Centers Are Running Out of Power (It's Not Power Generation)...
15.
Source: youtube.com
Title: Why Tech Companies Are Quietly Cancelling AI Data Centers
Link:https://www.youtube.com/watch?v=e0Dlr07jfjA
Source snippet
How AI Is Pushing the Semiconductor Supply Chain to the Limit | Bloomberg Primer...
16.
Source: cnas.org
Title: American AI Companies Can’t Get Enough Chips | CNAS
Link:https://www.cnas.org/publications/reports/american-ai-companies-cant-get-enough-chips
Source snippet
American AI Companies Can’t Get Enough Chips | CNAS...
17.
Source: semiconductors.org
Title: Powering AI: The Semiconductor Ecosystem at the Foundation of Data Centers
Link:https://www.semiconductors.org/powering-ai-the-semiconductor-ecosystem-at-the-foundation-of-data-centers/
18.
Source: eweek.com
Title: A I Chip Bottlenecks Put Enterprise Plans Under Pressure | e Week
Link:https://www.eweek.com/news/ai-chip-bottlenecks/
19.
Source: datacenterknowledge.com
Title: After the Power Crunch, AI Infrastructure Hits a GPU Wall
Link:https://www.datacenterknowledge.com/infrastructure/after-the-power-crunch-ai-infrastructure-hits-a-gpu-wall